In the circuit the emitter is forward biased and collector is reversed biased. this makes input resistance(Ri) very low and output resistance(Rout) very high. During positive half cycle of input AC decreases the forward bias hence emitter current(IE) and by transistor collector current increases. This tends to increase the collector voltage. which is given by V0 = VCE = VCC − ICRL. The high value of RL produces large change in V0 corresponding to low change in Vi. Thus amplified pulse obtained at collector.
Voltage gain :
voltage gain (AV) = ΔVCE/ΔVBE = (ΔIC)RL/(ΔIB)Ri
Where RL and Ri are output and input resistance respectively
(AV) = ((ΔIC)/(ΔIB))RL/Ri
Since βAC = (ΔIC)/(ΔIB)
(AV) = βAC RL/Ri
The output voltage of CE amplifier differ in phase from input voltage by 180 degree or in opposite phase is represented by
Therefore voltage gain (AV) = −βAC RL/Ri