Identify the gate and match A, B, Y in bracket to check. AND(A=1,B=1,Y=1) OR(A=1,B=1,Y=0) NOT(A=1,B=1,Y=1) XOR(A=0,B=0,Y=0)

The given diagrams involve 2 gates. The first 1 is an AND gate followed by a NOT Gate, with the compliment of the output of the first gate used as an input to the other gate which is NAND gate as NOT gate. We consider the 4 combinations
A=1,B=1,AB=1,(AB)'=0,¬AB=1,Y=0
A=1,B=0,AB=0,(AB)'=1,¬AB=0,Y=1
A=1,B=0,AB=0,(AB)'=1,¬AB=0,Y=1
A=0,B=0,AB=0,(AB)'=1,¬AB=0,Y=1
The above configuration represents that of an AND gate.