The circuit as shown in figure, the equivalent gate is NOR gate, OR gate, AND gate, NAND gate

Let the outputs of individual gates be labelled as X, Y and Z respectively starting from left to right. we have:
Z=¯¯¯¯YY=¯¯¯¯¯¯¯¯¯XX=¯¯¯¯¯X+¯¯¯¯¯X=¯¯¯¯¯XX=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯A+B⇒Z=X=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯A+B.Thus, the combination behaves as NOR gate.